; * *************************************************************
; * sfvSkillDemo.il - Hierarchical schematic and symbol demo
; * *************************************************************
; *
; * Version 1.0  -  2026-07-27
; * Tested with Virtuoso IC6.1.8
; *
; * Copyright (c) 2026 Greg Warwar
; * SPDX-License-Identifier: MIT
; * Licensed under the MIT License. See LICENSE for full text.
; *
; * Contributed to the IEEE Solid-State Circuits Society
; * San Fernando Valley Chapter
; * This code is provided as-is, with no warranty.
; * https://sfv-sscs.org/CODE
; * *************************************************************
; *
; * Builds a three level design from nothing, to show what the
; * functions in sfvSkillFuncs.il do.
; *
; *   sfvDemoAmp   symbol only, drawn by hand
; *   sfvDemoRC    schematic built from analogLib parts, plus its symbol
; *   sfvDemoTop   schematic built from the two cells above
; *
; * Before running:
; *   1. Create a library yourself. This script does not create one.
; *   2. Set sfvDemoLib below to that library name.
; *   3. load( "sfvSkillFuncs.il" )
; *   4. sfvDemoAll()
; *
; * Component values are left at their defaults. Set them yourself
; * afterward if you want to simulate. The point here is structure and
; * connectivity, not electrical behavior.
; * *************************************************************


sfvDemoLib = "myLib"


; * *************************************************************
; * analogLib terminal geometry
; *
; * res, cap, and vdc all share the same layout in R0. Terminal one
; * sits at the instance origin, terminal two directly below it.
; * gnd has a single terminal at its origin.
; *
; * Placed R90, terminal two moves to the right of the origin instead
; * of below it. If a resistor comes out extending left, change the
; * R90 below to R270.
; * *************************************************************

sfvDemoDevLen = 0.375


; * *************************************************************
; * Level 1 - a symbol drawn by hand
; * *************************************************************

procedure( sfvDemoAmpSym()
  prog( ( sv )
    sv = sfvOpenSym( sfvDemoLib "sfvDemoAmp" )

    sfvAddPoly( sv list( list( 0.0 -0.25 ) list( 0.0 0.25 ) list( 0.5 0.0 ) ) )
    sfvAddCircle( sv 0.5625 0.0 0.0625 0.0625 )

    sfvAddLine( sv -0.25 0.0 0.0 0.0 )
    sfvAddLine( sv 0.625 0.0 0.875 0.0 )

    sfvAddSymPin( sv -0.25 0.0 "IN" "input" "centerRight" "R0" 0.0625 )
    sfvAddSymPin( sv 0.875 0.0 "OUT" "output" "centerLeft" "R0" 0.0625 )

    sfvAddSymBox( sv -0.25 -0.25 0.875 0.25 )
    sfvAddSymNLP( sv -0.25 0.3125 "[@instanceName]" "lowerLeft" "R0" 0.0625 )

    sfvCloseSaveSym( sv )
    return( t )
  )
)


; * *************************************************************
; * Level 2 - a schematic built from analogLib parts
; *
; * IN ---- R0 ---- MID ---- OUT
; *                  |
; *                 C0
; *                  |
; *                 gnd
; * *************************************************************

procedure( sfvDemoRCSch()
  prog( ( sc resSym capSym gndSym wID )
    sc = sfvOpenSch( sfvDemoLib "sfvDemoRC" )

    resSym = sfvGetSym( "analogLib" "res" )
    capSym = sfvGetSym( "analogLib" "cap" )
    gndSym = sfvGetSym( "analogLib" "gnd" )

    sfvPutSym( sc resSym "R0" 1.0 3.0 "R90" )
    sfvPutSym( sc capSym "C0" 2.0 3.0 "R0" )
    sfvPutSym( sc gndSym "G0" 2.0 2.25 "R0" )

    sfvAddPortInp( sc 0.5 3.0 "IN" "R0" )
    sfvAddPortOut( sc 2.75 3.0 "OUT" "MY" )

    sfvAddWire( sc 0.5 3.0 1.0 3.0 )

    wID = sfvAddWire( sc 1.375 3.0 2.0 3.0 )
    sfvAddLabl( sc wID 1.6875 3.0 "MID" "lowerCenter" "R0" 0.0625 )

    sfvAddWire( sc 2.0 3.0 2.75 3.0 )
    sfvAddWire( sc 2.0 2.625 2.0 2.25 )

    sfvCloseSaveSch( sc )
    return( t )
  )
)


; The symbol for the block above. Pin names must match the terminal
; names created in the schematic, or the two views will not bind.

procedure( sfvDemoRCSym()
  prog( ( sv )
    sv = sfvOpenSym( sfvDemoLib "sfvDemoRC" )

    sfvAddRect( sv 0.0 -0.25 0.75 0.25 )
    sfvAddText( sv 0.375 0.0 "RC" "centerCenter" "R0" 0.0625 )

    sfvAddLine( sv -0.25 0.0 0.0 0.0 )
    sfvAddLine( sv 0.75 0.0 1.0 0.0 )

    sfvAddSymPin( sv -0.25 0.0 "IN" "input" "centerRight" "R0" 0.0625 )
    sfvAddSymPin( sv 1.0 0.0 "OUT" "output" "centerLeft" "R0" 0.0625 )

    sfvAddSymBox( sv -0.25 -0.25 1.0 0.25 )
    sfvAddSymNLP( sv -0.25 0.3125 "[@instanceName]" "lowerLeft" "R0" 0.0625 )

    sfvCloseSaveSym( sv )
    return( t )
  )
)


; * *************************************************************
; * Level 3 - a schematic built from the cells above
; *
; * V0 ---- I0 (RC) ---- I1 (Amp) ---- I2 (RC) ---- OUT
; * *************************************************************

procedure( sfvDemoTopSch()
  prog( ( sc vdcSym gndSym rcSym ampSym wID )
    sc = sfvOpenSch( sfvDemoLib "sfvDemoTop" )

    vdcSym = sfvGetSym( "analogLib" "vdc" )
    gndSym = sfvGetSym( "analogLib" "gnd" )
    rcSym = sfvGetSym( sfvDemoLib "sfvDemoRC" )
    ampSym = sfvGetSym( sfvDemoLib "sfvDemoAmp" )

    sfvPutSym( sc vdcSym "V0" 1.0 4.0 "R0" )
    sfvPutSym( sc gndSym "G0" 1.0 3.25 "R0" )

    sfvPutSym( sc rcSym "I0" 2.25 4.0 "R0" )
    sfvPutSym( sc ampSym "I1" 4.0 4.0 "R0" )
    sfvPutSym( sc rcSym "I2" 5.375 4.0 "R0" )

    sfvAddWire( sc 1.0 3.625 1.0 3.25 )
    sfvAddWire( sc 1.0 4.0 2.0 4.0 )

    wID = sfvAddWire( sc 3.25 4.0 3.75 4.0 )
    sfvAddLabl( sc wID 3.5 4.0 "N1" "lowerCenter" "R0" 0.0625 )

    wID = sfvAddWire( sc 4.875 4.0 5.125 4.0 )
    sfvAddLabl( sc wID 5.0 4.0 "N2" "lowerCenter" "R0" 0.0625 )

    sfvAddWire( sc 6.375 4.0 6.875 4.0 )
    sfvAddPortOut( sc 6.875 4.0 "OUT" "MY" )

    sfvAddText( sc 1.0 5.0 "sfvSkillFuncs demo" "lowerLeft" "R0" 0.125 )

    sfvCloseSaveSch( sc )
    return( t )
  )
)


; * *************************************************************
; * Build everything. Order matters. A symbol has to exist before a
; * schematic can place it.
; * *************************************************************

procedure( sfvDemoAll()
  prog( ()
    sfvDemoAmpSym()
    sfvDemoRCSch()
    sfvDemoRCSym()
    sfvDemoTopSch()

    printf( "sfvSkillDemo - built sfvDemoAmp, sfvDemoRC, sfvDemoTop in %s\n" sfvDemoLib )
    return( t )
  )
)


; * *************************************************************
; * End - Hierarchical schematic and symbol demo
; * *************************************************************

; load( "sfvSkillFuncs.il" )
; load( "sfvSkillDemo.il" )
; sfvDemoAll()

; * *************************************************************